[Design Root]
Version=1.0.0
[Directory]
bus_int.sch=Sch
bus2.sch=Sch
count000.sch=Sch
count001.sch=Sch
count002.sch=Sch
count003.sch=Sch
count004.sch=Sch
count005.sch=Sch
top.sch=Sch
p2_bus.sch=Sch
top.ERC=Text
GREG PARTS.LIB=PCBLib
bus_int.ERC=Text
GREGS SYMBOLS.lib=SchLib
top.lib=SchLib
bus2.ERC=Text
count_revD.PCB=PCB
count_revD.lib=PCBLib
[bus_int.sch]
Editor Kind=Sch
[bus2.sch]
Editor Kind=Sch
[count000.sch]
Editor Kind=Sch
[count001.sch]
Editor Kind=Sch
[count002.sch]
Editor Kind=Sch
[count003.sch]
Editor Kind=Sch
[count004.sch]
Editor Kind=Sch
[count005.sch]
Editor Kind=Sch
[top.sch]
Editor Kind=Sch
Attributes=131072
[p2_bus.sch]
Editor Kind=Sch

[top.ERC]
Editor Kind=Text
Attributes=131072
[Root]
Description=Rev 2 board - Moved oscillator and added fanout to make interconnect between CPLDs synchronous, added diode terminations for CPLD interconnects, removed unused oscillator.
[GREG PARTS.LIB]
Editor Kind=PCBLib

[bus_int.sch Childlist]
ChildCount=1
Child1=49FCT807

[bus_int.ERC]
Editor Kind=Text

[GREGS SYMBOLS.lib]
Editor Kind=SchLib

[top.lib]
Editor Kind=SchLib

[bus2.ERC]
Editor Kind=Text

[top.sch Childlist]
ChildCount=9
Child1=count000.sch
Child2=count001.sch
Child3=count002.sch
Child4=count003.sch
Child5=count004.sch
Child6=count005.sch
Child7=bus2.sch
Child8=bus_int.sch
Child9=p2_bus.sch

[count_revD.PCB]
Editor Kind=PCB

[count_revD.lib]
Editor Kind=PCBLib
Description=count_revD.lib