Index of /~ao/Electronic/Peter_dump/Electronics/Hardware/pc_remote_bus_rev2.0_hva_diff

Icon  Name                                             Last modified      Size  Description
[PARENTDIR] Parent Directory - [TXT] README.txt 2003-08-20 13:16 1.7K [DIR] lc37256/ 2004-05-26 12:02 - [TXT] pcRemoteHvaDiffV2dot0.bmk 2003-08-20 12:21 0 [   ] pcRemoteHvaDiffV2dot0.hie 2003-08-20 12:22 1.0K [   ] pc_remote_bus.ctl 2003-08-20 12:46 6.0K [   ] pc_remote_bus.jed 2003-08-20 12:49 150K [   ] pc_remote_bus.pin 2003-08-20 12:49 4.3K [   ] pc_remote_bus.rpt 2003-08-20 12:49 455K [   ] pc_remote_bus.vh 2003-08-20 12:49 1.0K [TXT] pc_remote_bus.vhd 2003-08-12 16:54 33K [   ] pc_remote_bus.vhh 2003-08-20 12:49 1.1K [   ] pc_remote_bus.wde 2003-08-20 12:49 122 [   ] pc_remote_bus_rev2.0.cfg 2003-08-20 12:50 182 [   ] pc_remote_bus_rev2.0.isr 2003-08-20 12:50 8.8K [TXT] pc_remote_bus_rev2.0.log 2003-08-20 12:50 71K [   ] pc_remote_bus_rev2.0.ply 2003-08-20 12:50 89 [   ] pc_remote_bus_rev2.0_dev1.stp 2003-08-20 12:50 71K [   ] pc_remote_bus_rev2.0_vrfy.stp 2003-08-20 12:50 2.8K [TXT] pc_remote_bus_rev2dot0.bmk 2003-08-20 12:09 0 [   ] pc_remote_bus_rev2dot0.hie 2003-08-20 12:49 913 [   ] pc_remote_bus_rev2dot0.pfg 2003-08-20 13:13 802 [VID] probe_counter_dong.jed 2003-08-11 13:25 145K [VID] probe_hva_dong.jed 2003-08-20 12:05 145K [DIR] vhd/ 2004-05-26 12:02 - [   ] warp.mk 2003-08-20 12:47 115 [   ] warp.rc 2003-08-20 12:49 46 [   ] wrp.rpt 2003-08-20 12:49 3.6K
This directory contains files that are for the remote MFB boards' (Counter and HVA Chassis) pc_remote_bus CPLD.  The VHDL source and pinout files were sourced from Redline under the directory:

/scr2/AO/H85_project/Electronics/Hardware/Mutifunction board bus Rob

The archive of design files was shifted over to jeans on the server Duke.  So the source files now reside on server Duke under the directory

/netdisks/shared.ifa/AO/H85_project/Electronics/Hardware/Mutifunction board bus Rob


The VHDL code has been modified to remove the delays programmed into the pc_remote_bus CPLD that were placed there for working with the slow National Instruments' DIO card.  With the new DIO card from Adlink these delays are not necessary.

Another change has been made to correct some differences between the H85 and NICI implementations (that we're currently developing) and the IRTF 36 element system.  In the current implementations the Counter and HVA boards are implemented in seperate chassis.  The old MFB code continued try to execute counter reads of the backplane in the HVA chassis.  They're not necessary and cause some clashes with the corrections being written to the HVA boards from the MFB.  SO, the VHDL code has been modified to look at an input pin to the chip from a DIP Switch on the MFB board.  This pin indicates whether the board is inserted into an HVA chassis or Counter chassis.  When configured for use in the HVA chassis, backplane reads are disabled to avoid the bus clash.  Look at signal hva_chassis_en_l.

In addition I've cleaned up some of the random comments left around from the last couple years of design and degugging.


Mike Thompson  7/10/03